1. Field of the Invention
The present invention is directed to an improved method of assembling and testing an electronics module, and more particularly, to the use of demountable interconnections to allow removal and replacement of individual integrated circuits composing the module.
2. Background
Modern day electronics or computer systems often include one or more electronics modules comprising a module board, such as a printed circuit board, onto which a number of integrated circuits are mounted. The module board typically includes conductive traces for such things as interconnecting the integrated circuits; bringing power, ground, and/or voltage reference signals onto the module board and to the integrated circuits; and bringing data, control, timing, clock, and/or other signals onto and off of the module board. The module board also typically includes connectors for connecting to other module boards, other modules, or other elements of the overall electronics system. Often such an electronics module must be capable of reliably functioning at a given clock speed, data rate, or operating speed (hereinafter referred to collectively as “operating speed” or simply “speed”). Typically, such a module is sold to customers with an assurance that the module is capable of operating at its rated speed.
FIG. 1 illustrates steps common in prior art methods of making, rating, and testing electronics modules to ensure that they are capable of operating at a particular speed. Initially, integrated circuits, which may be microprocessors, memories, microcontrollers, analog circuits, digital signal processing circuits, or any other kind of integrated circuit, are manufactured 102. Typically, each integrated circuit is individually tested to determine its maximum operating speed 104. The actual tested operating speed of each integrated circuit, however, must be down graded 106. The primary reason for the need to down grade is that the environment in which the integrated circuit is tested is different than the module environment. For example, the integrated circuit is typically tested by itself but will operate in a system comprising other integrated circuits and a module board with interconnections. Indeed, the interconnections on the module board providing signal paths between integrated circuits and to connections off of the module board by themselves may introduce parasitics that may significantly reduce the operating speed of the integrated circuit.
Down grading the tested operating speed of the integrated circuit provides a safety margin (some times referred to as a “guard band”) that increases the likelihood that a module will be capable of operating at the rated speed (as down graded) of its constituent integrated circuits. Once individually tested and rated, the integrated circuits are sorted (or “binned”) by their down graded speed rating 108.
A module intended to operate at a particular speed is assembled by selecting integrated circuits sorted into the group or bin that corresponds to that operating speed 110. The assembled modules are then tested 112. Modules that pass are sold and shipped to customers 114, while modules that fail are typically discarded.
As should be apparent, the practice of guard banding introduces inefficiencies into the process of making electronic modules. For example, some, if not many, of the integrated circuits would be capable of operating at a higher speed than their down graded rating in the module environment. Guard banding these integrated circuits results in use of less than the full capability of the integrated circuits. On the other hand, if the integrated circuits are not guard banded, those that will not function properly at their tested speed in a module environment will cause any module in which they are included to fail. Thus, a way of minimizing or eliminating the need to guard band integrated circuits without causing significant numbers of assembled modules to fail is needed.